Publications & Talks

Selected Publications

Multilayer Printed Circuit Board Square Waveguide in Ka Band

Conference Paper | By Neha Mahendarkar Vijayakumar, Rhonda Franklin, Rashaunda Henderson

Conference: URSI GASS 2021, Rome, Italy, 28 August - 4 September 2021

Waveguide Excitation Using On-Chip Antenna for Wireline Data Links

Conference Paper | By M. Mishra, Neha M. Vijayakumar, R. Henderson, H. Trivedi, I. Momson, M. Gomez, N. Aflakian, Z. Chen, K. O. Kenneth, and D. MacFarlane

Conference: Proceedings of the IEEE International Conference on Microwaves, Antennas, Communications, and Electronic Systems (COMCAS), 2019

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Submillimeter wave manifold diplexer designed in 65nm CMOS

Conference Paper | By Neha M. Vijayakumar, M. Gomez, K. O. Kenneth, and R. Henderson

Conference: in Proc. IEEE Topical Conf. Wireless Sensors and Sensor Networks (WiSNet), 2018, pp. 19–22

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Submillimeter Wave Diplexer Design in 65nm CMOS technology

Conference Presentation | By Neha M. Vijayakumar, M. Gomez, R. M. Henderson

Conference: Presented in SRC TECHCON 2017, by SRC - Semiconductor Research Corporation · Jul 14, 2017

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Selected Works

Explore Your Potential with Experiential Learning: A Comprehensive Guide to STEM Education

Blog Post

Event: Blog Post- Personal Blog

View Publication/Talk

Design of PCB-based chip–to-waveguide transition at 25GHz.

Presentation

Event: TxACE STARS, Dallas, TX, USA

Presentation, 2018

65nm CMOS diplexer and PCB-based quadruple ridge waveguide designed for submillimeter wave wireline systems.

Presentation

Event: SRC Review, Dallas, TX, USA

Presentation, 2017

Submillimeter wave manifold diplexer designed in 65nm CMOS technology

Presentation

Event: TxACE Symposium, Dallas, TX, USA

Presentation, 2017

Submillimeter wave multiplexer design in 65nm CMOS technology.

Presentation

Event: SRC TECHCON 2017

Presentation

Submillimeter wave multiplexer design in 65nm CMOS technology.

Presentation

Event: Texas Symposium, Waco, TX, USA

Presentation, 2017

Submillimeter wave multiplexer design in 65nm CMOS technology.

Presentation

Event: TxACE Symposium, Dallas, TX, USA

Presentation, 2016